NPTEL-Workshop

Tentative Schedule

Day	Topic	Lab Materials	Lab Handout	Mode
Day 1 - 28th June	Software Installation		-	Live - 10:30 am Digital_Circuits_Lab Channel
	Full Adder	Introduction to VHDL by Prof. Dinesh Sharma 📽 Structural description of Full Adder by Prof. Dinesh Sharma 📽 Full Adder Testbench by Prof. Dinesh Sharma 📽 VHDL_by_Peter_J_Ashenden.pdf 📃 Full Adder Demo Resources 📁 Structural Description by Prof. Dinesh Sharma 📽 Using Quartus for project generation and simulation.pdf	-	Live - 10:30 am Digital_Circuits_Lab Channel
	Introduction by Prof. Dinesh Sharma	-	-	Live - 3 p.m. General Channel
	Post-Lab	Quartus Design Flow 📽	4-bit Adder-Sub Mux Decoder	Offline
Day 2 - 29th June	Doubt Session	-	-	Live - 3 p.m. Digital_Circuits_Lab Channel
Day 3 - 30th June	Krypton + UrJTAG	Max V Device support installation UrJATG Installation Instruction UrJATG Installation Files (Windows) UrJATG Installation Files (Ubuntu) Test SVF File Using Krypton and UrJTAG Krypton Drivers	-	Live - 10:30 am
Day 4 - 1st July	Scanchain	Virtual JTAG based Scanchain Scanchain Files Python and Pip installation guide	Prime Detector	Live - 10:30 am Digital_Circuits_Lab Channel
Day 4 - 1st July	Lecture by Prof. Dinesh Sharma	-	-	Live - 3 p.m. Digital_Circuits_Lab Channel
Day 5 - 2nd July	Homework Problem	-	-	Offline
Day 6 - 3rd July	Proctored Test - I	-	-	Live - 10:30 a.m.
Day 7 - 4th July	Weekly off
Day 8 - 5th July	Test - I Solution (discussion)	Presentation Slides	ALU Behavioural Description	Live - 10:30 a.m. Digital_Circuits_Lab Channel
	Behavioural Modelling Demo	Behavioural Model by Prof. Dinesh Sharma (Part 1) Behavioural Model by Prof. Dinesh Sharma (Part 2)	-	Live - 10:30 a.m. Digital_Circuits_Lab Channel
	Homework Problem	-	ALU (Homework)	Offline
Day 9 - 6th July	Lecture by Prof. Virendra Singh	-	-	Live - 2 p.m. Digital_Circuits_Lab Channel
	Sequence Detector	Presentation Slides Sequence Detector (abab)	Sequence Detector (Behavioural) Sequence Detector (Structural)	Live - 3:30 p.m. Digital_Circuits_Lab Channel
	Homework	Sequence Detector (aabb_bbaa) TRACEFILE	Sequence Detector aabb_bbaa	Offline
Day 10 - 7th July	Doubt Session	-	-	Live - 2 p.m. Digital_Circuits_Lab Channel
Day 11 - 8th July	Lecture by Prof. Virendra Singh	-	-	Live - 2 p.m. Digital_Circuits_Lab Channel
Day 11 - 8th July	Clock Divider	Handout Clock_divider (Design + Testbench)	-	Live - 3 p.m. Digital_Circuits_Lab Channel
Day 12 - 9th July	SaReGaMa	SaReGaMa - Skeleton Code	-
Day 13 - 10th July	Proctored Test - II	Solution	-	Live - 10:30 a.m.